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sense & control data sheet rev. 1.1, 2015-09 tli5012b e1000 angle sensor gmr-based angle sensor
tli5012b e1000 data sheet 2 rev. 1.1, 2015-09
tli5012b e1000 data sheet 3 rev. 1.1, 2015-09 trademarks of infineon technologies ag aurix?, c166?, canpak?, ci pos?, cipurse?, econopac k?, coolmos?, coolset?, corecontrol?, crossav e?, dave?, di-pol?, easypim?, econobridge?, econodual?, econopim?, econopack?, eicedriver?, eupec?, fcos?, hitfet?, hybridpack?, i2rf?, isoface?, isopack?, mipaq?, modstack?, my-d?, novalithic?, optimos?, origa?, powercode?; primarion?, pr imepack?, primestack?, pr o-sil?, profet?, rasic?, reversave?, satric?, si eget?, sindrion?, sipmos?, smartl ewis?, solid flash?, tempfet?, thinq!?, trenchstop?, tricore?. other trademarks advance design system? (ads) of agilent te chnologies, amba?, arm?, multi-ice?, keil?, primecell?, realview?, thumb?, vision? of arm limited, uk. autosar? is licensed by autosar development partnership. bluetooth? of bluetooth sig inc. cat-iq? of dect forum. colossus?, firstgps? of trimble navigation ltd. emv? of emvc o, llc (visa holdings in c.). epcos? of epcos ag. flexgo? of microsoft corp oration. flexray? is licensed by flexray consortium. hyperterminal? of hilgraeve incorporated. iec? of commission electrot echnique internationale. irda? of infrared data association corporation. iso? of international organization for standardization. matlab? of mathworks, inc. maxim? of maxim integrated products, inc. microtec?, nucleus? of mentor graphics corporation. mipi? of mipi allianc e, inc. mips? of mips technologies, inc., u sa. murata? of murata manufacturing co., microwave office? (mwo) of applied wave research inc., omnivision? of omnivision technologies, inc. openwave? openwave systems inc. red hat? red hat, inc. rfmd? rf micro devices, inc. sirius? of si rius satellite radio inc. solaris? of sun microsystems, inc. spansion? of spansion llc ltd. symbian? of symbian software limited. taiyo yuden? of taiyo yuden co. teaklite? of ceva, inc. tektro nix? of tektronix inc. toko? of toko kabushiki kaisha ta. unix? of x/open company limited. verilo g?, palladium? of cadence design systems, inc. vlynq? of texas instruments incorpor ated. vxworks?, wind river? of wind ri ver systems, inc. zetex? of diodes zetex limited. last trademarks update 2011-11-11 revision history page or item subjects (major changes since previous revision) rev. 1.1, 2015-09 chapter 1.4 disclaimer modified
tli5012b e1000 table of contents data sheet 4 rev. 1.1, 2015-09 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.3 application example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.4 disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 functional block description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.1 internal power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.2 oscillator and pll . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.3 sd-adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.4 digital signal processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.5 interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 sensing principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.5 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4 specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3.1 input/output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.3.2 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3.3 gmr parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3.4 angle performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.3.5 signal processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.3.6 clock supply (clk timing definition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.3.6.1 external clock operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.4 interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.1 incremental interface (iif) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4.2 synchronous serial communication (ssc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.4.2.1 ssc timing definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.4.2.2 ssc data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.4.3 supply monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4.3.1 internal supply voltage comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4.3.2 v dd overvoltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4.3.3 gnd - off comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.4.3.4 v dd - off comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.1 package parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.2 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.3 footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 5.4 packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 table of contents
tli5012b e1000 table of contents data sheet 5 rev. 1.1, 2015-09 5.5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
tli5012b e1000 list of figures data sheet 6 rev. 1.1, 2015-09 figure 1-1 pg-dso-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 2-1 tli5012b e1000 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 2-2 sensitive bridges of the gmr sensor (not to scale) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 2-3 ideal output of the gmr sensor bridges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 2-4 pin configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 3-1 application circuit for tli5012b e1000 with iif in terface and ssc (using internal clk) . . . . . . . . 14 figure 3-2 ssc configuration in sensor-slave mode with push-pull outputs (high-speed application) . . . . . . 15 figure 3-3 ssc configuration in sensor-slave mode and open-dr ain (bus systems) . . . . . . . . . . . . . . . . . . . . 15 figure 4-1 allowed magnetic field range as function of junction temperature.. . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 4-2 offset and amplitude definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 4-3 additional angle error for temperature changes above 5 kelvin within 1.5 revolutions . . . . . . . . . 21 figure 4-4 signal path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 4-5 delay of sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 4-6 external clk timing definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 4-7 incremental interface with a/b mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 4-8 incremental interface with step/direction mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 4-9 ssc timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 4-10 ssc data transfer (data-read example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 4-11 ssc data transfer (data-write example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 4-12 ssc bit ordering (read example) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 4-13 update of update registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 4-14 fast crc polynomial division circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 4-15 overvoltage comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 4-16 gnd - off comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 4-17 v dd - off comparator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 5-1 pg-dso-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 5-2 position of sensing element . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 5-3 footprint of pg-dso-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 5-4 tape and reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 list of figures
tli5012b e1000 list of tables data sheet 7 rev. 1.1, 2015-09 table 1-1 derivate ordering codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 2-1 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 table 4-1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 4-2 operating range and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 4-3 input voltage and output currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 4-4 driver strength characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 4-5 electrical parameters for 4.5 v < v dd < 5.5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 4-6 electrical parameters for 3.0 v < v dd < 3.6 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 4-7 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 4-8 basic gmr parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 4-9 angle performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 4-10 signal processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 4-11 internal clock timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 4-12 external clock specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 4-13 incremental interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 4-14 ssc push-pull timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 4-15 ssc open-drain timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 4-16 structure of the command word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 4-17 structure of the safety word . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 4-18 bit types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 table 4-19 test comparator threshold voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 5-1 package parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 5-2 sensor ic placement tolerances in package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 list of tables
tli5012b e1000 product description data sheet 8 rev. 1.1, 2015-09 1 product description figure 1-1 pg-dso-8 package 1.1 overview the tli5012b e1000 is a 360 angle sensor that detects t he orientation of a magnetic field. this is achieved by measuring sine and cosine angle components with monolithic i ntegrated giant magneto resistance (igmr) elements. these raw signals (sine and cosine) are digitally processed internally to calculate the angle orientation of the magnetic field (magnet). the tli5012b e1000 is a pre-calibrated sensor. the calibra tion parameters are stored in laser fuses. at start-up the values of the fuses are written into flip-flops, wher e these values can be changed by the application-specific parameters. further precision of the angle measurement over a wide temperature range and a long lifetime are improved with the internal autocalibration algorithm. data communications are accomplished with a bi-directi onal synchronous serial communication (ssc) that is spi-compatible. the sensor configuration is stored in registers, which are accessi ble by the ssc interface. additionally the tli5012b e1000 has incremental interface (iif), table 1-1 derivate ordering codes product type marking ordering code package tli5012b e1000 i12b1000 sp001415550 pg-dso-8
tli5012b e1000 product description data sheet 9 rev. 1.1, 2015-09 1.2 features the tli5012b e1000 has the following features and pre- configuration. the configuration can be changed via ssc interface. ? g iant m agneto r esistance (gmr)- based principle. ? integrated magnetic field sensing for angle measurement. ? 360 angle measurement with revolution counter and angle speed measurement. ? max. 1.9 angle error over lifetime and temp erature-range with activated auto-calibration ? synchronous serial communication (ssc) with 15 bit representation of absolute angle value (0.01 resolution) ? incremental interface (iif) with 12 bit resolution of angle value on the output (one count per 0.088 angle step). ? incremental interface (iif) in a/b mode with abso lut count enabled (provides absolute value at output) ? fast angle update period (42.7s). ? autocalibration mode 1 enabled. ? prediction disabled. ? hysteresis set to 0.703. ? bus mode operation of multiple sensors on one lin e is possible with ssc in open-drain configuration. ? diagnostic functions and status information. ? ifa/ifb/ifc pins set to push-pull output. ? bi-directional ssc interface. data pin set to push-pu ll output with 8mbit/s baud rate (2mbit/s in open-drain). ? ifa/ifb/ifc pins set to strong driver, da ta pin set to strong driver, fast edge. ? voltage spike filter on input pads disabled. ? two separate highly accurate single bit sd-adc. ? rohs compliant (pb-free package). ? halogen-free. 1.3 application example the tli5012b e1000 gmr-based angle sensor is des igned for angular position sensing in industrial and consumer applications such as electrical commutated motor (e.g. bldc), fans or pumps. 1.4 disclaimer the qualification of this product is based on jedec jesd47 and may refe rence existing qualification results of similar products. such referring is justif ied by the structural similarity of t he products. the product is not qualified and manufactured according to the requirements of infi neon technologies with regard to automotive applications.
tli5012b e1000 functional description data sheet 10 rev. 1.1, 2015-09 2 functional description 2.1 block diagram figure 2-1 tli5012b e1000 block diagram 2.2 functional block description 2.2.1 internal power supply the internal stages of the tli5012b e1000 are supplied with several voltage regulators: ? gmr voltage regulator, vrg ? analog voltage regulator, vra ? digital voltage regulator, vrd (derived from vra) these regulators are directly connected to the supply voltage v dd . 2.2.2 oscillator and pll the digital clock of the tli5012b e1000 is given by th e phase-locked loop (pll), which is by default fed by an internal oscillator. in order to syn chronize the tli5012b e1000 with othe r ics in a system, the tli5012b e1000 vrg vra vrd tli5012b e1000 v dd x gmr y gmr temp sd- adc sd- adc sd- adc digital signal processing unit cordic ccu ram ssc interface incremental interface csq sck data ifa ifb gnd ifc osc pll ism fuses
tli5012b e1000 functional description data sheet 11 rev. 1.1, 2015-09 can be configured via ssc interface to use an external clock signal supplied on the ifc pin as source for the pll, instead of the internal clock. external clock mode is only available in pwm or spc interface configuration. 2.2.3 sd-adc the s igma- d elta a nalog- d igital- c onverters ( sd-adc ) transform the analog gmr voltages and temperature voltage into the digital domain. 2.2.4 digital signal processing unit the digital signal processing unit (dspu) contains the: ? i ntelligent s tate m achine ( ism ), which does error compensation of offs et, offset temperature drift, amplitude synchronicity and orthogonality of the raw signals from the gmr bridges, and performs additional features such as auto-calibration, prediction and angle speed calculation ? co ordinate r otation di gital c omputer ( cordic ), which contains the trigonometric function for angle calculation ? c apture c ompare u nit ( ccu ), which is used to generate the pwm and spc signals ? r andom a ccess m emory ( ram ), which contains the configuration registers ? laser fuses, which contain the calibration parameters for the error-compensation and the ic default configuration, which is loaded into the ram at startup 2.2.5 interfaces bi-directional communication with the tli5012b e1000 is enab led by a three-wire ssc inte rface. in parallel to the ssc interface, an incremental interface (iif) can be sele cted, which is available on the ifa, ifb, ifc pins. 2.3 sensing principle the giant magneto resistance (gmr) sensor is implemen ted using vertical integrat ion. this means that the gmr-sensitive areas are integrated above the logic pa rt of the tli5012b e1000 device. these gmr elements change their resistance depending on the direction of the magnetic field. four individual gmr elements are connected to one wheatstone sensor bridge. these gmr elements sense one of two components of the applied magnetic field: ? x component, v x (cosine) or the ? y component, v y (sine) with this full-bridge st ructure the maximum gmr signal is available an d temperature effects cancel out each other. in figure 2-2 , the arrows in the resistors represent the magnetic direction which is fixed in the reference layer. if the external magnetic field is parallel to the direction of th e reference layer, the resistance is minimal. if they are anti-parallel, resi stance is maximal. the output signal of each bridge is only unambiguous over 180 between two maxima. therefore two bridges are oriented orthogonally to each other to measure 360. with the trigonometric function arctan 2, the true 360 angle value is calc ulated out of the raw x and y signals from the sensor bridges.
tli5012b e1000 functional description data sheet 12 rev. 1.1, 2015-09 figure 2-2 sensitive bridges of the gmr sensor (not to scale) attention: due to the rotational placement inaccuracy of the sensor ic in the package, the sensors 0 position may deviate by up to 3 from the package edge direction indicated in figure 2-2 . figure 2-3 ideal output of the gmr sensor bridges v dd gnd adc x + gmr resistors adc x -adc y +adc y - v x v y 0 n s 90 v angle 90 180 270 360 0 v x (cos) y component (sin) v y (sin) v y v x x component (cos)
tli5012b e1000 functional description data sheet 13 rev. 1.1, 2015-09 2.4 pin configuration figure 2-4 pin configuration (top view) 2.5 pin description table 2-1 pin description pin no. symbol in/out function 1 ifc (iif_idx) o interface c: iif index 2 sck i ssc clock 3 csq i ssc chip select 4 data i/o ssc data 5 ifa (iif_a) o interface a: iif phase a 6v dd - supply voltage 7gnd-ground 8 ifb (iif_b) o interface b: iif phase b 12 34 5 6 7 8 center of sensitive area
tli5012b e1000 application circuits data sheet 14 rev. 1.1, 2015-09 3 application circuits the application circuits in this chap ter show the various communication po ssibilities of the tli5012b e1000. the pin output mode configuration is device-specific and it can be either push-pull or open-drain. the bit ifab_od (register ifab, 0d h ) indicates the output mode for the ifa, ifb a nd ifc pins. the ssc pins are by default push- pull (bit ssc_od, register mod_3, 09 h ). figure 3-1 shows a basic block diagram of a tli5012b e1000 with incremental interface and ssc configuration. the derivate tli5012b e1000 is by default configured with push-pull ifa (iif_a), ifb (iif_ b) and ifc (iif_idx) pins. figure 3-1 application circuit for tli5012b e1000 with iif interface and ssc (using internal clk) in case that the ifa, ifb and ifc pins are configurated via the ssc interface as open-drain pins, three resistors (one for each line) between output line and v dd would be recommended (e.g. 2.2k ). vrg vra vrd tli5012b e1000 x gmr y gmr temp sd- adc sd- adc sd- adc ssc interface incremental interface osc *) recommended, e.g. 100 ? 100nf ifc (iif_idx) v dd (3.0 ? 5.5v) **) gnd pll csq sck data ifa (iif_a) ifb (iif_b) ssc iif **) recommended, e.g. 470 ? *) *) digital signal processing unit cordic ccu ram ism fuses
tli5012b e1000 application circuits data sheet 15 rev. 1.1, 2015-09 synchronous serial communication (ssc) configuration in figure 3-1 the ssc interface has the default push-pull configuration (see details in figure 3-2 ). series resistors on the data, sck (serial clock signal) and csq (chip sele ct) lines are recommended to limit the current in the erroneous case that either the sensor pushes high and the microcontroller pulls low at the same time or vice versa. the resistors in the sck and csq lines are only necessary in case of disturbances or noise. figure 3-2 ssc configuration in sensor-slave mode with push-pull outputs (high-speed application) it is also possible to use an open-drain setup for the data, sck and csq lines. this setup is designed to communicate with a microcontroller in a bus system, toge ther with other ssc slaves (e.g. two tli5012b e1000 devices for redundancy reasons). this mode can be activated using the bit ssc_od. the open-drain configuration can be seen in figure 3-3 . series resistors on the data, sck, and csq lines are recommended to limit the current in case either the microcon troller or the sensor are accidentally switched to push- pull. a pull-up resistor of typ. 1 k is required on the data line. figure 3-3 ssc configuration in sensor-slave mode and open-drain (bus systems) shift reg. shift reg . clock gen. data mtsr mrst sck sck (ssc slave) tli5012b e1000 c (ssc master ) csq csq **) *) *) en en *) optional, e.g. 100 ? **) optional, e.g. 470 ? shift reg. shift reg . clock gen. data mtsr mrst sck sck (ssc slave) tli5012b e1000 c (ssc master ) csq csq *) *) *) *) typ. 1k ? *) optional, e.g. 100 ?
tli5012b e1000 specification data sheet 16 rev. 1.1, 2015-09 4 specification 4.1 absolute maximum ratings attention: stresses above the max. values listed here may cause permanent damage to the device. exposure to absolute maximum rating conditions for extended periods may affect device reliability. maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the device. 4.2 operating range the following operating conditions must not be exceeded in order to ensure correct operation of the tli5012b e1000. all parameters specified in the following sections refer to these operating conditions, unless otherwise noted. table 4-2 is valid for -40c < t j < 125c unless otherwise noted. table 4-1 absolute maximum ratings parameter symbol values unit note / test condition min. typ. max. voltage on v dd pin with respect to ground (v ss ) v dd -0.5 6.5 v max 40 h/lifetime voltage on any pin with respect to ground (v ss ) v in -0.5 6.5 v v dd + 0.5 v junction temperature t j -40 125 c magnetic field induction b 200 mt max. 5 min @ t a = 25c 150 mt max. 5 h @ t a = 25c storage temperature t st -40 125 c without magnetic field table 4-2 operating range and parameters parameter symbol values unit note / test condition min. typ. max. supply voltage v dd 3.0 5.0 5.5 v 1) supply current i dd 14 16 ma magnetic induction at t j = 25c 2)3) b xy 30 50 mt -40c < t j < 125c 30 60 mt -40c < t j < 100c 30 70 mt -40c < t j < 85c extended magnetic induction range at t j = 25c 2)3) b xy 25 30 mt additional angle error of 0.1 angle range ang 0 360 por level v por 2.0 2.9 v power-on reset por hysteresis v porhy 30 mv
tli5012b e1000 specification data sheet 17 rev. 1.1, 2015-09 the field strength of a magnet can be selected within the colored area of figure 4-1 . by limitation of the junction temperature, a higher magnetic field can be applied. in case of a maximum temperature t j = 100c, a magnet with up to 60mt at t j = 25c is allowed. it is also possible to widen the magnetic field range for higher temperatures. in that case, additional angle errors have to be considered. figure 4-1 allowed magnetic field range as function of junction temperature. power-on time 4) t pon 57msv dd > v ddmin ; fast reset time 5) t rfast 0.5 ms fast reset is triggered by disabling startup bist (s_bist = 0), then enabling chip reset (as_rst = 1) 1) directly blocked with 100-nf ceramic capacitor 2) values refer to a homogeneous magnetic field (b xy ) without vertical magnetic induction (b z = 0mt). 3) see figure 4-1 4) during ?power-on time,? write access is not permitted (except fo r the switch to external clock which requires a readout as a confirmation that external clock is selected) 5) not subject to production test - ve rified by design/characterization table 4-2 operating range (cont?d) and parameters parameter symbol values unit note / test condition min. typ. max. 30 40 50 60 70 80 90 100 25 85 100 30 50 60 70 temperature (c) magnetic field (mt) 65 54 125 44 26 -40 +0.1 angle error @ 25mt
tli5012b e1000 specification data sheet 18 rev. 1.1, 2015-09 4.3 characteristics 4.3.1 input/output characteristics the indicated parameters apply to the full operating range, unless otherwise specified. the typical values correspond to a supply voltage v dd = 5.0 v and 25 c, unless individually specified. all other values correspond to -40 c < t j < 125c. within the register mod_3, the driver strength and th e slope for push-pull communication can be varied depending on the sensor output. the driv er strength is specified in table 4-3 and the slope fall and rise time in table 4-4 . table 4-3 input voltage and output currents parameter symbol values unit note / test condition min. typ. max. input voltage v in -0.3 5.5 v v dd + 0.3 v output current (data-pad) i q -25 ma pad_drv =?0x?, sink current 1)2) 1) max. current to gnd over open-drain output 2) at v dd = 5 v -5 ma pad_drv =?10?, sink current 1)2) -0.4 ma pad_drv =?11?, sink current 1)2) output current (ifa / ifb / ifc - pad) i q -15 ma pad_drv =?0x?, sink current 1)2) -5 ma pad_drv =?1x?, sink current 1)2) table 4-4 driver strength characteristic parameter symbol values unit note / test condition min. typ. max. output rise/fall time t fall , t rise 8 ns data, 50 pf, pad_drv=?00? 1)2) 1) valid for push-pull output 2) not subject to production test - ve rified by design/characterization 28 ns data, 50 pf, pad_drv=?01? 1)2) 45 ns data, 50 pf, pad_drv=?10? 1)2) 130 ns data, 50 pf, pad_drv=?11? 1)2) 15 ns ifa/ifb, 20 pf, pad_drv=?0x? 1)2) 30 ns ifa/ifb, 20 pf, pad_drv=?1x? 1)2)
tli5012b e1000 specification data sheet 19 rev. 1.1, 2015-09 table 4-5 electrical parameters for 4.5 v < v dd < 5.5 v parameter symbol values unit note / test condition min. typ. max. input signal low-level v l5 0.3 v dd v input signal high level v h5 0.7 v dd v output signal low-level v ol5 1v data; i q = -25 ma (pad_drv=?0x?), i q = -5 ma (pad_drv=?10?), i q = -0.4 ma (pad_drv=?11?) 1v ifa,b,c; i q = -15 ma (pad_drv=?0x?), i q = -5 ma (pad_drv=?1x?) pull-up current 1) 1) internal pull-ups on csq and data pin are always enabled. i pu -10 -225 acsq -10 -150 adata pull-down current 2) 2) internal pull-downs on ifa, ifb and ifc are enabled during startup and in open-drain mode, internal pull-down on sck is always enabled. i pd 10 225 asck 10 150 a ifa, ifb, ifc table 4-6 electrical parameters for 3.0 v < v dd < 3.6 v parameter symbol values unit note / test condition min. typ. max. input signal low-level v l3 0.3 v dd v input signal high level v h3 0.7 v dd v output signal low-level v ol3 0.9 v data; i q = -15 ma (pad_drv=?0x?), i q = -3 ma (pad_drv=?10?), i q = -0.24 ma (pad_drv=?11?) 0.9 v ifa,ifb; i q = - 10 ma (pad_drv=?0x?), i q = -3 ma (pad_drv=?1x?) pull-up current 1) 1) internal pull-ups on csq and data pin are always enabled. i pu -3 -225 acsq -3 -150 adata pull-down current 2) 2) internal pull-downs on ifa, ifb and ifc are enabled during startup and in open-drain mode, internal pull-down on sck is always enabled. i pd 3225 asck 3150 a ifa, ifb, ifc
tli5012b e1000 specification data sheet 20 rev. 1.1, 2015-09 4.3.2 esd protection 4.3.3 gmr parameters all parameters apply over b xy = 30mt and t a = 25c, unless otherwise specified. figure 4-2 offset and amplitude definition table 4-7 esd protection parameter symbol values unit notes min. max. esd voltage v hbm 4.0 kv 1) 1) human body model (hbm) accord ing to ansi/esda/jedec js-001 v cdm 0.5 kv 2) 2) charged device model (cdm) according to jesd22-c101 table 4-8 basic gmr parameters parameter symbol values unit note / test condition min. typ. max. x, y output range rg adc 23230 digits operating range 1) 1) not subject to production test - ve rified by design/characterization x, y amplitude 2) 2) see figure 4-2 a x , a y 6000 9500 15781 digits at ambient temperature 3922 20620 digits operating range 1) x, y synchronicity 3) 3) k = 100*(a x /a y ) k 87.5 100 112.49 % x, y offset 4) 4) o y =(y max + y min ) / 2; o x = (x max + x min ) / 2 o x , o y -2048 0 +2047 digits x, y orthogonality error ? -11.25 0 +11.24 x, y amplitude without magnet x 0 , y 0 +4096 digits operating range 1) angle 90 180 270 360 0 +a offset v y 0 -a
tli5012b e1000 specification data sheet 21 rev. 1.1, 2015-09 4.3.4 angle performance after internal calculation, the sensor has a remaining error, as shown in table 4-9 . the error value refers to b z = 0mt and the operating conditions given in table 4-2 ?operating range and parameters? on page 16 . the overall angle error represents the relative angle erro r. this error describes the deviation from the reference line after zero-angle definition. it is valid for a static ma gnetic field. if the magnetic field is rotating during the measurement, an additional propagation error is caused by the angle delay time (see table 4-10 ?signal processing? on page 23 ), which the sensor needs to calculate the angle from the raw sine and cosine values from the mr bridges. in fast-turning applications, predic tion can be enabled to reduce this propagation error. autocalibration enables online parameter calculation and therefore reduces the angle error due to temperature and lifetime drifts. the tli5012b e1000 needs 1.5 revolutions to generate new autocalibration parameters. these parameters are continuously updated. the parameters ar e updated in a smooth way (one least-significant bit within the chosen range or time) to avoid an angle jump on the output. if the temperature changes by more than 5 kelvin during 1.5 revolutions an additional error has to be added to the specified angle error in table 4-9 . this error depends on the temperature change (delta temperature) as well as from the initial temperature (tstart) as shown in figure 4-3 . once the temperature stab ilizes and the application completes 1.5 revolutions, then the angle error is as specified in table 4-9 . for negative delta temperature changes (from higher to lower temperatures) the addit ional angle error will be smaller than the corresponding positive delta temperatur e changes (from lower to higher temperatures) shown in figure 4-3 . the figure 4-3 applies to th e worst case. figure 4-3 additional angle error for temperature ch anges above 5 kelvin within 1.5 revolutions table 4-9 angle performance parameter symbol values unit note / test condition min. typ. max. overall angle error at 25c err 1.0 including lifetime drift 1)2)3) . 1) including hysteresis error, caused by revolution direction change 2) relative error after zero angle definition 3) with autocalibration (pre-configured by default). no temper ature changes >5 kelvin within 1.5 revolutions considered. overall angle error -40c...125c err 1.9 including temperature & lifetime drift 1)2)3)4) 4) not subject to production test - ve rified by design/characterization 0 0.5 1 1.5 2 2.5 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 additional angle error () delta temperature (kelvin) within 1.5 revolutions tstart -40c tstart -20c tstart 25c tstart 85c tstart 105c
tli5012b e1000 specification data sheet 22 rev. 1.1, 2015-09 4.3.5 signal processing figure 4-4 signal path the signal path of the tli5012b e1000 is depicted in figure 4-4 . it consists of the gmr-bridge, adc, filter and angle calculation. the delay time between a physical ch ange in the gmr elements and a signal on the output depends on the filter and interface configurations. in fa st turning applications, this delay causes an additional rotation speed dependent angle error. the tli5012b e1000 has an optional prediction feature, which serves to reduce the speed dependent angle error in applications where the rotation speed does not change abruptly. prediction uses the difference between current and last two angle values to appr oximate the angle value which will be present after the delay time (see figure 4-5 ). the output value is calculated by adding this difference to the measured value, according to equation (4.1) . (4.1) figure 4-5 delay of sensor output x gmr y gmr sd- adc sd- adc angle calculation filter filter tli5012b e1000 microcontroller if adeliif t delif t adelssc t ) 2 ( ) 1 ( ) ( ) 1 ( ? ? ? + = + t t t t d d d d time angle with prediction without prediction t adel t upd magnetic field direction sensor output
tli5012b e1000 specification data sheet 23 rev. 1.1, 2015-09 all delay times specified in table 4-10 are valid for an ideal internal oscilla tor frequency of 24 mhz. for the exact timing, the variation of the in ternal oscillator frequency has to be taken into account (see chapter 4.3.6 ) table 4-10 signal processing parameter symbol values unit note / test condition min. typ. max. filter update period t upd 42.7 s fir_md = 1 (default) 1) 1) not subject to production test - ve rified by design/characterization 85.3 sfir_md = 2 1) 170.6 sfir_md = 3 1) angle delay time without prediction 2) 2) valid at constant rotation speed t adelssc 85 95 sfir_md = 1 1) 150 165 sfir_md = 2 1) 275 300 sfir_md = 3 1) t adeliif 120 135 sfir_md = 1 1) 180 200 sfir_md = 2 1) 305 330 sfir_md = 3 1) angle delay time with prediction 2) t adelssc 45 50 s fir_md = 1; predict = 1 1) 65 70 s fir_md = 2; predict = 1 1) 105 115 s fir_md = 3; predict = 1 1) t adeliif 75 90 s fir_md = 1; predict = 1 1) 95 110 s fir_md = 2; predict = 1 1) 135 150 s fir_md = 3; predict = 1 1) angle noise (rms) n angle 0.08 fir_md = 1 1) 0.05 fir_md = 2 1) (default) 0.04 fir_md = 3 1)
tli5012b e1000 specification data sheet 24 rev. 1.1, 2015-09 4.3.6 clock supply (clk timing definition) the internal clock supply of the tli5012b e1000 is subj ect to production-specific va riations, which have to be considered for all ti ming specifications. 4.3.6.1 external clock operation in order to fix the ic timing and sync hronize the tli5012b e1000 with other ics in a system, it can be switched to operate with an external clock signal supplied to the ifc pin. the clo ck input signal mu st fulfill certain requirements: ? the high or low pulse width must not exceed the s pecified values, because the pll needs a minimum pulse width and must be spike-filtered. ? the duty cycle factor should typically be 50%, but it can vary between 30% and 70%. ? the pll is triggered at the positive edge of the clock. if more than 2 edges are missing, a chip reset is generated automatically and the sensor restarts with the internal clock. this is in dicated by the s_rst, and clk_sel bits, and additionally by the safety word (see chapter 4.4.2.2 ). figure 4-6 external clk timing definition table 4-11 internal clock timing specification parameter symbol values unit note / test condition min. typ. max. digital clock f dig 22.3 24 26.3 mhz internal oscillator frequency f clk 3.7 4.0 4.4 mhz table 4-12 external cl ock specification parameter symbol values unit note / test condition min. typ. max. input frequency f clk 3.7 4.0 4.4 mhz clk duty cycle 1)2) 1) minimum duty cycle factor: t clkh(min) / t clk with t clk = 1 / f clk 2) maximum duty cycle factor: t clkh(max) / t clk with t clk = 1 / f clk clk duty 30 50 70 % clk rise time t clkr 30 ns from v l to v h clk fall time t clkf 30 ns from v h to v l t clkh t clkl t clk t v l v h
tli5012b e1000 specification data sheet 25 rev. 1.1, 2015-09 4.4 interfaces 4.4.1 incremental interface (iif) the i ncremental i nter f ace ( iif ) emulates the operation of an optical quadrature encoder with a 50% duty cycle. it transmits a square pulse per angle step, where the width of the steps can be configured from 9bit (512 steps per full rotation) to 12bit (4096 steps per full rotation) within the register mod_4 (ifab_res). the rotation direction is given either by the phase shift between the two channels ifa and ifb (a/b mode) or by the level of the ifb channel (step/direction mode), as shown in figure 4-7 and figure 4-8 . the incremental interface can be configured for a/b mode or step/direction mode in register mod_1 (iif_mod). using the incremental interface requires an up/down counter on the microcontroller, which counts the pulses and thus keeps track of the absolute position. the counter ca n be synchronized periodically by using the ssc interface in parallel. the angle value (aval register) read out by the ssc interface can be compared to the stored counter value. in case of a non-syn chronization, the microcontroller adds the difference to the actual counter value to synchronize the tli5012b e1000 with the microcontroller. after startup, the iif transmits a number of pulses which correspond to the actual absolute angle value. thus, the microcontroller gets the information about the absolute po sition. the index signal that indicates the zero crossing is available on the ifc pin. sensors with preset iif are av ailable as tli5012b e1000. a/b mode the phase shift between phases a and b indicates either a clockwise (a follows b) or a counterclockwise (b follows a) rotation of the magnet. figure 4-7 incremental interface with a/b mode step/direction mode phase a pulses out the increments and phase b indicates the direction. figure 4-8 incremental interface with step/direction mode 90 el . phase shift 0 1 2 3 4 5 6 7 6 5 4 3 2 1 phase a counter phase b incremental interface (a/b mode) v h v l v h v l step counter direction incremental interface (step /direction mode) v h v l v h v l 0 1 2 3 4 5 6 7 6 5 4 3 2 1
tli5012b e1000 specification data sheet 26 rev. 1.1, 2015-09 table 4-13 incremental interface parameter symbol values unit note / test condition min. typ. max. incremental output frequency f inc 1.0 mhz frequency of phase a and phase b 1) 1) not subject to production test - ve rified by design/characterization index pulse width t 0 5 s0 1)
tli5012b e1000 specification data sheet 27 rev. 1.1, 2015-09 4.4.2 synchronous serial communication (ssc) the 3-pin ssc interface consists of a bi-directional pu sh-pull (tri-state on receive) or open-drain data pin (configurable with ssc_od bit) and the serial clock and chip-select input pins. the ssc interface is designed to communicate with a microcontroller peer-to-peer for fast applications. 4.4.2.1 ssc timing definition figure 4-9 ssc timing ssc inactive time (cs off ) the ssc inactive time defines the de lay time after a transfer before the tli5012b e1000 can be selected again. table 4-14 ssc push-pull timing specification parameter symbol values unit note / test condition min. typ. max. ssc baud rate f ssc 8.0 mbit/s 1) 1) not subject to production test - ve rified by design/characterization csq setup time t css 105 ns 1) csq hold time t csh 105 ns 1) csq off t csoff 600 ns ssc inactive time 1) sck period t sckp 120 125 ns 1) sck high t sckh 40 ns 1) sck low t sckl 30 ns 1) data setup time t datas 25 ns 1) data hold time t datah 40 ns 1) write read delay t wr_delay 130 ns 1) update time t csupdate 1 ssee figure 4-13 1) sck off t sckoff 170 ns 1) sck t css t sckp t sckh t csh csq t sckl t csoff t datas data t datah
tli5012b e1000 specification data sheet 28 rev. 1.1, 2015-09 4.4.2.2 ssc data transfer the ssc data transfer is word-aligned. the following transfer words are possible: ? command word (to access and change operating modes of the tli5012b e1000) ? data words (any data transferred in any direction) ? safety word (confirms the data transf er and provides status information) figure 4-10 ssc data transfer (data-read example) figure 4-11 ssc data transfer (data-write example) table 4-15 ssc open-drain timing specification parameter symbol values unit note / test condition min. typ. max. ssc baud rate f ssc 2.0 mbit/s pull-up resistor = 1k ? 1) 1) not subject to production test - ve rified by design/characterization csq setup time t css 300 ns 1) csq hold time t csh 400 ns 1) csq off t csoff 600 ns ssc inactive time 1) sck period t sckp 500 ns 1) sck high t sckh 190 ns 1) sck low t sckl 190 ns 1) data setup time t datas 25 ns 1) data hold time t datah 40 ns 1) write read delay t wr_delay 130 ns 1) update time t csupdate 1 ssee figure 4-13 1) sck off t sckoff 170 ns 1) command read data 1 read data 2 safety-word ssc-master is driving data ssc-slave is driving dat a t wr_delay command write data 1 safety-word ssc-master is driving data ssc-slave is driving dat a t wr_delay
tli5012b e1000 specification data sheet 29 rev. 1.1, 2015-09 command word ssc communication between the tli5012b e1000and a micr ocontroller is initiated by a command word. the structure of the command word is shown in table 4-16 . if an update is trig gered by shortly pulling low csq without a clock on sck a snapshot of all syst em values is stored in the update r egisters simultaneously. a read command with the upd bit set then allows to readou t this consistent se t of values instead of the current values. bits with an update buffer are marked by an ?u? in the type column in register descriptions. safety word the safety word consists of the following bits: table 4-16 structure of the command word name bits description rw [15] read - write 0: write 1: read lock [14..11] 4-bit lock value 0000 b : default operating access for addresses 0x00:0x04 1010 b : configuration access for addresses 0x05:0x11 upd [10] update-register access 0: access to current values 1: access to values in update buffer addr [9..4] 6-bit address nd [3..0] 4-bit number of data words table 4-17 structure of the safety word name bits description stat 1) 1) when an error occurs, the corresponding status bit in the sa fety word remains ?low? until the stat register (address 00 h ) is read via ssc interface. chip and interface status [15] indication of chip reset or watchd og overflow (resets after readout) via ssc 0: reset occurred 1: no reset [14] system error (e.g. overvoltage; undervoltage; v dd -, gnd- off; rom;...) 0: error occurred (s_v r; s_dspu; s_ov; s_xyo l: s_magol; s_fuse; s_rom; s_adct) 1: no error [13] interface access error (access to wrong address; wrong lock) 0: error occurred 1: no error [12] valid angle value (no_gmr_a = 0; no_gmr_xy = 0) 0: angle value invalid 1: angle value valid resp [11..8] sensor number response indicator the sensor number bit is pulled low and the other bits are high crc [7..0] cyclic redundancy check (crc)
tli5012b e1000 specification data sheet 30 rev. 1.1, 2015-09 bit types the types of bits used in the registers are listed here: data communication via ssc figure 4-12 ssc bit ordering (read example) figure 4-13 update of update registers the data communication via ssc interface has the following characteristics: ? the data transmission order is most-significant bi t (msb) first, last-signi ficant bit (lsb) last. ? data is put on the data line with the rising edge on sck and read with the fa lling edge on sck. ? the ssc interface is word-aligned. all functions are activated after each transmitted word. ? after every data transfer with nd 1, the 16-bit safety word is appended by the tli5012b e1000. ? a ?high? condition on the chip select pin (csq) of the selected tli5012b e1000 interrupts the transfer immediately. the crc calculat or is automatically reset. ? after changing the data direction, a delay t wr_delay (see table 4-15 ) has to be implemented before continuing the data transfer. this is necessa ry for internal register access. ? if in the command word the number of data is greater than 1 (nd > 1), then a corresponding number of consecutive registers is read, star ting at the addres s given by addr. table 4-18 bit types abbreviation function description r read read-only registers w write read and write registers u update update buffer for this bit is present. if an update is issued and the update- register access bit (upd in command wo rd) is set, the immediate values are stored in this update buffer simulta neously. this allows a snapshot of all necessary system parameters at the same time. sck data 8 11 10 9 msb 14 13 12 csq ssc transfer lsb 321 7 6 5 4 command w ord data word (s) ssc -m aster is dr iving dat a ssc -slave is driving dat a lsb 1 rw addr length lock msb t wr_delay upd sck data csq lsb lsb msb command w ord data word (s) update -signal update -event ssc -master is driving dat a ssc -slave is driving dat a t csupdate
tli5012b e1000 specification data sheet 31 rev. 1.1, 2015-09 ? in case an overflow occurs at address 3f h , the transfer continues at address 00 h . ? if in the command word the number of data is zero ( nd = 0), the register at the address given by addr is read, but no safety word is sent by the tli5012b e1000. this allows a fast readout of one register. ? at a rising edge of csq without a prec eding data transfer (no sck pulse, see figure 4-13 ), the content of all registers which have an update buffer is saved into the buffer. this procedure serves to take a snapshot of all relevant sensor parameters at a given time. the content of the update buffer can then be read by sending a read command for the desired register and setting the upd bit of the command word to ?1?. ? after sending the safety word, the transfer ends. to start another data transfer, the csq has to be deselected once for at least t csoff . ? by default, the ssc interface is set to push-pull. the pu sh-pull driver is active only if the tli5012b e1000 has to send data, otherwise the data pin is set to high-impedance. cyclic redundancy check (crc) ? this crc is according to the j1850 bus specification. ? every new transfer rest arts the crc generation. ? every byte of a transfer will be ta ken into account to generate th e crc (also the sent command(s)). ? generator polynomial: x8+x4+x3+x2+1, but for the c rc generation the fast-crc gene ration circuit is used (see figure 4-14 ) ? the seed value of the fast crc circuit is ?11111111 b ?. ? the remainder is inverted before transmission. figure 4-14 fast crc polynomial division circuit xor x7 x6 x5 x4 x3 x2 xor x0 xor xor input serial crc output & tx_crc 1111 1 1 1 1 x1 parallel remainder
tli5012b e1000 specification data sheet 32 rev. 1.1, 2015-09 4.4.3 supply monitoring the internal voltage nodes of the tli5012b e1000 are moni tored by a set of comparators in order to ensure error- free operation. an over- or undervoltage condition must be ac tive at least 256 periods of the digital clock to set the corresponding error bits in the status regist er. this works as digital spike suppression. over- or undervoltage errors trigger the s_vr bit of status register. this error condition is signaled via the in the safety word of the ssc protocol, the status nibble of th e spc interface or the lower diagnostic range of the pwm interface. 4.4.3.1 internal supply voltage comparators every voltage regulator has an overvoltage (ov) comparator to detect malfunctions. if the nominal output voltage of 2.5 v is larger than v ovg , v ova and v ovd , then this overvoltage comparator is activated. 4.4.3.2 v dd overvoltage detection the overvoltage detection comparator monitors the external supply voltage at the v dd pin. figure 4-15 overvoltage comparator 4.4.3.3 gnd - off comparator the gnd - off comparator is used to detect a voltage di fference between the gnd pin and sck. this circuit can detect a disconnection of the supply gnd pin. table 4-19 test comparator threshold voltages parameter symbol values unit note / test condition min. typ. max. overvoltage detection v ovg 2.80 v 1) 1) not subject to production test - ve rified by design/characterization v ova 2.80 v 1) v ovd 2.80 v 1) v dd overvoltage v ddov 6.05 v 1) v dd undervoltage v dduv 2.70 v 1) gnd - off voltage v gndoff -0.55 v 1) v dd - off voltage v vddoff 0.55 v 1) spike filter delay t del 10 s 1) ref - + 10s spike filter xxx_ov v dda gnd gnd v dd v rg v ra v rd
tli5012b e1000 specification data sheet 33 rev. 1.1, 2015-09 figure 4-16 gnd - off comparator 4.4.3.4 v dd - off comparator the v dd - off comparator detects a disconnection of the vdd pin supply voltage. in this case, the tli5012b e1000 is supplied by the sck and csq input pins via the esd structures. figure 4-17 v dd - off comparator - + 10s spike filter gnd_off v dda gnd sck gnd v dd +dv diode- reference 1s mono flop 10s spike filter vdd _off v dda gnd v dd csq sck -dv gnd 1s mono flop - + v vddoff
tli5012b e1000 package information data sheet 34 rev. 1.1, 2015-09 5 package information 5.1 package parameters 5.2 package outline figure 5-1 pg-dso-8 package dimension table 5-1 package parameters parameter symbol limit values unit notes min. typ. max. thermal resistance r thja 150 200 k/w junction to air 1) 1) according to jedec jesd51-7 r thjc 75 k/w junction to case r thjl 85 k/w junction to lead soldering moisture level msl 3 260c lead frame cu plating sn 100% > 7 m
tli5012b e1000 package information data sheet 35 rev. 1.1, 2015-09 figure 5-2 position of sensing element 5.3 footprint figure 5-3 footprint of pg-dso-8 table 5-2 sensor ic placement tolerances in package parameter values unit notes min. max. position eccentricity -200 200 m in x- and y-direction rotation -3 3 affects zero po sition offset of sensor tilt -3 3 0.65 1.31 5.69 1.27
tli5012b e1000 package information data sheet 36 rev. 1.1, 2015-09 5.4 packing figure 5-4 tape and reel 5.5 marking processing note: for processing recommendations, please refer to infineon?s notes on processing position marking description 1st line i12b1000 see ordering table on page 8 2nd line xxx lot code 3rd line gxxxx g..green, 4-digit..date code 8 6.4 5.2 0.3 0.3 12 2.1 1.75
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